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Steve Flannagan's
Awards and Credentials

Steve Flannagan has been acclaimed by co-workers, executives and customers for his professionalism, technical achievements, leadership, teamwork, and especially for his dedication to the success of each and every individual.

Here we portray just a few of the awards that people in the electronics business have presented to Steve.

Early 1980's: Right The First Time

At both Intel and Motorola, Steve and his friends developed methods for chip verification and simulation, to achieve correct designs early in the development process. Particularly, they applied insightful anticipation of various possible modes of operation for chips.

1983 - 1986: New Fast SRAM Ideas

Steve and his teams revolutionized Fast SRAM designs. Quality engineering and professionalism gave us full-spec samples earlier in the development process. Input buffers were tolerant to "address float" conditions; data amplifiers and other circuits were implemented which gave very wide margins to asynchronous control and address edges; yields were increased to these issues. Roughly speaking, the new family of Static RAMs were twice as fast and used only half the power of ordinary designs.

Steve recognized the development team in an article in the Motorola magazine "MOS-TALK" in August of 1985. "We feel that the cooperation of the entire team was exemplary," said Steve.

A new Architecture: The use of local amplification trades a small amount of area efficiency for a dramatic improvement in speed of the static RAM (U.S. Patent 4,698,788 "Memory Architecture with Sub Arrays".) The project and its many innovations was written up in a 3-page article in Electronics Magazine, August 7th, 1986. More technical descriptions were given at the International Solid-State Circuits Conference (ISSCC) February 1986, and in the Journal of Solid-State Circuits October 1986.

Steve and his team introduced high-speed CMOS static RAMs at the 64K density in 1986, the 256K density in 1989, and a family of ultra-high-speed BiCMOS SRAMs at 1-Meg density in 1991. Each generation of SRAM was recognized as the fastest commercially available SRAM of its type in the world in volume production. Fast SRAMs were designed in multiple formats, with both TTL and ECL interfaces, word-width from x1 to x36, with input/output levels tuned to match their environments and with voltage levels that differ from the chip supply.

In 1993 the Motorola Fast Static RAM Division was recognized as the number one producer of fast static RAMs in the world, and this dominance was maintained for the years 1993 through 1996, as independently verified by industry monitors, reaching a peak of more than $500 million in sales per year.

Flannagan Paper Judged Best

The Journal of Solid-State Circuits named principal author Steve Flannagan's article, "Two 13-ns 64K CMOS SRAMs with Very Low Active Power and Asynchronous Circuit Techniques," the best paper published in the 1986-1987 issues of the Journal.

The award was established by the IEEE Solid-State Circuits Council, which makes an annual presentation to the paper judged by the Journal's editors and reviewers to be the most outstanding work published during the August through June publication year. Papers are judged on accuracy, originality, importance of technical content, and the quality and readability of the writing.

Presentation of the Best Paper Award took place during the formal opening of the International Solid-State Circuits Conference in February of 1988. Steve is shown accepting the award from Chairman Pricer on behalf of himself and co-authors Paul Reed, Peter Voss, Scott Nogle, Larry Day, Dr. David Sheng, Dr. John Barnes, and Roger Kung (Then VP and Director of Memory Design.) John Barnes looks on at right. [Photo by Bill Lane.]

To celebrate the Best Paper award, Motorola wrote a story for their magazine "MOS-TALK," Featuring a description and photo of the authors. Shown (Left-to-Right) are Roger Kung, Dr. David Sheng, Paul Reed, Steve Flannagan and Larry Day. (Not shown: co-authors Scott Nogle, Peter Voss, Dr. John Barnes.)

The DAN NOBLE FELLOW Award - 1988

In 1988, Steve Flannagan was awarded the title of Fellow, the highest technical honor bestowed on company employees.

The award was recognized in an article in the company's magazine "Mos Talk" in February of 1989, including a photo of Steve (center) receiving congratulations, a commemorative plaque and a watch from Corporate Vice President Jim George (left) and Technical Staff Vice President Roger Kung (right).

"It's great to be working on advanced designs," Steve said, "but the most satisfaction comes from being a part of a group that strives to be the best in the world. Our team members have been a success because of their technical excellence and their spirit of cooperation and professionalism."

The Dan Noble Fellow award is granted to the top technical contributors in the corporation. Only about one fifth of one percent of the professional engineering workforce becomes eligible for the honor in a given year.

"Congratulations, Steve. We're proud to have you on our team!"

Other Awards and Plaques Granted to Steve

1986: Scientific and Technical Society Award "In recognition of superior technical accomplishment and outstanding contribution"

1988: Distinguished Innovator Award from Motorola Semiconductor Products Sector, signed by Jim Norling, Vice President and General Manager.

1988: Science Advisory Board Associate Membership, "In recognition of creative and innovative technical contributions, and in particular for Memory Products Fast Static RAM Design and Performance Improvements," signed by Robert Galvin, Chairman of the board, and by William Braun, Director of Research and Development.

1989: Motorola Annual Report to Stockholders: Steve was recognized with a portrait and brief description of his technical contributions to the company.

1991: Fastest 1-Meg SRAM in the industry: "At 10 nanoseconds, the new 1 Megabit SRAM is the fastest available device in the industry. Even lower density SRAMs are in limited supply at these speeds." -An independent assessment of the 1-Meg TTL and ECL FSRAM family designed and developed by Steve and his team.

1996: Award Plaque: Motorola's First 4 Megabit Late-Write BiCMOS Fast Static RAM, "Presented on behalf of the Fast Static RAM Division and the High Performance Systems Operations to Steve Flannagan in appreciation of your significant design contributions."

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